HMS Multiplier Generator

This multiplier generator is capable of generating several kinds of multipliers that all have been based on the regular reduction tree of the High Performance Multiplier.

There are currently five different kinds of multipliers that can be generated:

• Unsigned Radix2 Multiplier
• Baugh-Wooley Multiplier
• Modified-Booth Multiplier
• Baugh-Wooley Twin-Precision Multiplier
• Modified-Booth Twin-Precision Multiplier

The multipliers can be based on either a HPM reduction tree or Wallace reduction tree and the recoding circuit when generating modified-Booth multipliers are either the one presented by Yeh et al or Hsu et al.

When generating a modified-Booth or Baugh-Wooley Twin-Precision multiplier the operands have to be even numbers. For the modified-Booth Twin-precision multipier the operands have to be a power of four.

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Operand width:
Multiplier type:	Unsigned - radix2 Signed - Baugh-Wooley Signed - modified Booth Signed - Twin-Precision Baugh-Wooley Signed - Twin-Precision modified Booth
Booth recoder: (only relevant when generating a Booth multiplier)	Yeh et al Hsu et al
Reduction tree:	HPM Wallace
Insert pipeline register before final adder:
Insert pipeline register before reduction tree:
Adder:	KoggeStone
Mode:	VHDL
Mail address to where the generated multiplier will be sent:

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More information about the multiplier techniques that the generator has been based on can be found in the following articles:

• M. Själander, and P. Larsson-Edefors
  "Multiplication Acceleration through Twin Precision"
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  vol. 17, no. 9, pp. 1233-1246, Sep. 2009. (BibTeX)


• M. Själander, H. Eriksson, and P. Larsson-Edefors
  "An Efficient Twin-Precision Multiplier"
  Proceedings of the 2004 IEEE International Conference on Computer Design
  pp. 30-33, Oct. 10-13 2004. (BibTeX)


• H. Eriksson, P. Larsson-Edefors, M. Sheeran, M. Själander, D. Johansson, and M. Schölin
  "Multiplier Reduction Tree with Logarithmic Logic Depth and Regular Connectivity"
  Proceedings of the 2006 IEEE International Symposium on Circuits and Systems
  pp. 15-20, May 21-24, 2006. (BibTeX)


• M. Själander, and P. Larsson-Edefors
  "High-Speed and Low-Power Multipliers Using the Baugh-Wooley Algorithm and HPM Reduction Tree"
  Proceedings of IEEE International Conference on Electronics, Circuits and Systems (ICECS 2008)
  pp. 33-36, 1-3 Sep. 2008. (BibTeX)

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Magnus Själander
www.sjalander.com/research/multiplier, 2008
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